Silicon Architecture Explorer

A microarchitecture is the actual logic design of a chip — how its cores, caches, schedulers and execution units are arranged — and it is what a vendor iterates on from one generation to the next. Names like Zen, Ada Lovelace, RDNA, Ampere and Blackwell each describe a distinct design family; every part sharing a name shares that underlying blueprint, which is why grouping by architecture tells you far more about a chip's character than its marketing model number does. Here each architecture card averages the performance index and perf-per-watt of every part built on it, so you can compare designs rather than individual SKUs.

The process node (quoted in nanometers, e.g. 7nm → 5nm → 4nm → 3nm) is the manufacturing technology the design is fabricated on — roughly, how small and dense the transistors are. A crucial caveat: modern node names are marketing labels, not literal physical measurements, and they are not directly comparable across foundries; a "4nm" part from one fab is not feature-for-feature equivalent to another's. Still, within a vendor's roadmap a smaller node generally packs more transistors into the same area at lower voltage, and the timeline above plots that shrink so you can see the trend rather than trust the label.

Smaller nodes and better designs both push perf-per-watt upward, and that is the metric that really separates generations. Lower-voltage transistors switch using less energy, so a newer architecture on a tighter node can deliver the same work for fewer watts — or far more work within the same thermal and power budget. That is why our timeline sizes each dot by perf-per-watt: the cloud of parts drifts up (smaller nodes) and grows (more efficient) as the years advance. See the full efficiency rankings in the Hardware Benchmark Database Pro.

The generational comparison turns all of this into a single answer: pick an older architecture as a baseline and a newer one as the target, and read off the index delta, the perf-per-watt gain and the node change. Some leaps come mostly from a node shrink, others from architectural rework (chiplet vs monolithic layouts, larger caches, wider pipelines), and many from both at once — but the deltas make the size of the jump concrete. To drill into the raw specs behind any architecture, open the Hardware Specifications Explorer for full cores, clocks, cache and memory detail.